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1 lt1371 500khz high efficiency 3a switching regulator the lt 1371 is a monolithic high frequency current mode switching regulator. it can be operated in all standardswitching configurations including boost, buck, flyback, forward, inverting and ?uk.?a 3a high efficiency switch is included on the die, along with all oscillator, control and protection circuitry. the lt1371 typically consumes only 4ma quiescentcurrent and has higher efficiency than previous parts. high frequency switching allows for very small inductors to be used. new design techniques increase flexibility and maintainease of use. switching is easily synchronized to an exter- nal logic level source. a logic low on the shutdown pin reduces supply current to 12 a. unique error amplifier circuitry can regulate positive or negative output voltagewhile maintaining simple frequency compensation tech- niques. nonlinear error amplifier transconductance re- duces output overshoot on start-up or overload recovery. oscillator frequency shifting protects external compo- nents during overload conditions. descriptio n u faster switching with increased efficiency uses small inductors: 4.7 h all surface mount components low minimum supply voltage: 2.7v quiescent current: 4ma typ current limited power switch: 3a regulates positive or negative outputs shutdown supply current: 12 a typ easy external synchronization boost regulators laptop computer supplies multiple output flyback supplies inverting supplies applicatio n s u typical applicatio n u 5v to 12v boost converter output current (a) 0.01 50 efficiency (%) 60 70 80 90 0.1 1 lt1371 ? ta02 100 v in = 5v 12v output efficiency lt1371 v in v c 5v gnd fb lt1371 ?ta01 v sw s/s l1* 4.7 h c1** 22 f 25v c4** 22 f 25v 2 c2 0.047 f c3 0.0047 f r3 2k r2 6.19k 1% r1 53.6k 1% v out ? 12v d1 mbrs330t3 on off * ** coilcraft do3316p-472 (4.7 h), do3316p-103 (10 h) or sumida cd104-100mc (10 h) avx tpsd226m025r0200 + + l1 4.7 h 10 h i out 0.7a 0.8a ? max i out features , ltc and lt are registered trademarks of linear technology corporation. downloaded from: http:///
2 lt1371 a u g w a w u w a r b s o lu t ex i t i s supply voltage ....................................................... 30v switch voltage lt1371 ............................................................... 35v lt1371hv .......................................................... 42v s/s, shdn, sync pin voltage ................................ 30v feedback pin voltage (transient, 10ms) .............. 10v feedback pin current ........................................... 10ma negative feedback pin voltage (transient, 10ms) ............................................. 10v operating ambient temperature range ...... 0 c to 70 c operating junction temperature range commercial .......................................... 0 c to 125 c industrial ......................................... 40 c to 125 c short circuit ......................................... 0 c to 150 c storage temperature range ................ 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c e lectr ic al c c hara terist ics v in = 5v, v c = 0.6v, v fb = v ref , v sw , s/s, shdn, sync and nfb pins open, unless otherwise noted. symbol parameter conditions min typ max units v ref reference voltage measured at feedback pin 1.230 1.245 1.260 v v c = 0.8v 1.225 1.245 1.265 v i fb feedback input current v fb = v ref 250 550 na 900 na reference voltage line regulation 2.7v v in 25v, v c = 0.8v 0.01 0.03 %/v wu u package / o rder i for atio t jmax = 125 c, ja = 30 c/w r package 7-lead plastic dd front view tab is gnd v in s/s v sw gnd nfb fb v c 7 6 5 4 3 2 1 order part number with package soldered to 0.5 inch 2 copper area over backside ground plane or internalpower plane. ja can vary from 20 c/w to >40 c/w depending on mounting technique order part number t7 package 7-lead to-220 v in s/s v sw gnd nfb fb v c front view 7 6 5 4 3 2 1 tab is gnd t jmax = 125 c, ja = 50 c/w, jc = 4 c/w order part number t jmax = 125 c, ja = 50 c/w ja will vary from approximately 40 c/w with 0.75 inch 2 of 1 oz copper to 50 c/w with 0.33 inch 2 of 1 oz copper on a double-sided board 1 2 3 4 5 6 7 8 9 10 top view sw package 20-lead plastic so wide 20 19 18 17 16 15 14 13 12 11 v c fb nfb gnd gnd gnd gnd shdn sync v in v sw nc v sw gnd gnd gnd gnd nc nc gnd lt1371crlt1371hvcr lt1371ir lt1371hvir lt1371ct7lt1371hvct7 lt1371it7 lt1371hvit7 lt1371cswlt1371hvcsw lt1371isw lt1371hvisw consult factory for military grade parts. downloaded from: http:///
3 lt1371 symbol parameter conditions min typ max units v nfb negative feedback reference voltage measured at negative feedback pin 2.540 2.490 2.440 v feedback pin open, v c = 0.8v 2.570 2.490 2.410 v i nfb negative feedback input current v nfb = v nfr ?5 ?0 ?5 a negative feedback reference voltage 2.7v v in 25v, v c = 0.8v 0.01 0.05 %/v line regulation g m error amplifier transconductance ? i c = 25 a 1100 1500 1900 mho 700 2300 mho error amplifier source current v fb = v ref ?150mv, v c = 1.5v 120 200 350 a error amplifier sink current v fb = v ref + 150mv, v c = 1.5v 1400 2400 a error amplifier clamp voltage high clamp, v fb = 1v 1.70 1.95 2.30 v low clamp, v fb = 1.5v 0.25 0.40 0.52 v a v error amplifier voltage gain 500 v/ v v c pin threshold duty cycle = 0% 0.8 1 1.25 v f switching frequency 2.7v v in 25v 450 500 550 khz 0 c t j 125 c 430 500 580 khz 40 c t j 0 c (i grade) 400 580 khz maximum switch duty cycle 85 95 % switch current limit blanking time 130 260 ns bv output switch breakdown voltage lt1371 35 47 v lt1371hv 0 c t j 125 c 42 47 v 40 c t j 0 c (i grade) 40 v v sat output switch on resistance i sw = 2a 0.25 0.45 i lim switch current limit duty cycle = 50% 3.0 3.8 5.4 a duty cycle = 80% (note 1) 2.6 3.4 5.0 a ? i in supply current increase during switch on time 15 25 ma/a ? i sw control voltage to switch current 4a / v transconductance minimum input voltage 2.4 2.7 v i q supply current 2.7v v in 25v 4 5.5 ma shutdown supply current 2.7v v in 25v, v s/s 0.6v 0 c t j 125 c 12 30 a 40 c t j 0 c (i grade) 50 a shutdown threshold 2.7v v in 25v 0.6 1.3 2 v shutdown delay 51 22 5 s s/s or shdn pin input current 0v v s/s or v shdn 5v ?0 15 a synchronization frequency range 600 800 khz e lectr ic al c c hara terist ics v in = 5v, v c = 0.6v, v fb = v ref , v sw , s/s, shdn, sync and nfb pins open, unless otherwise noted. the denotes specifications which apply over the full operating temperature range. note 1: for duty cycles (dc) between 50% and 90%, minimum guaranteed switch current is given by i lim = 1.33 (2.75 ?dc). downloaded from: http:///
4 lt1371 typical perfor m a n ce characteristics u w error amplifier output currentvs feedback pin voltage shutdown delay and thresholdvs temperature temperature ( c) ?0 0 shutdown delay ( s) shutdown threshold (v) 2 6 8 10 2014 0 50 75 lt1371 ?g04 4 16 1812 0 0.2 0.6 0.8 1.0 2.01.4 0.4 1.6 1.81.2 ?5 25 100 125 150 shutdown threshold shutdown delay s/s or shdn pin input currentvs voltage error amplifier transconductancevs temperature switching frequencyvs feedback pin voltage feedback pin voltage (v) 400 error amplifier output current ( a) 300 200 100 300100 0.1 0.1 200 0 0.3 0.2 v ref ?5 c 125 c 25 c lt1371 ?g06 minimum synchronizationvoltage vs temperature temperature ( c) ?0 0 minimum synchronization voltage (v p-p ) 0.5 1.0 1.5 2.0 05 0 100 150 lt1371 ?g05 2.5 3.0 ?5 25 75 125 f sync = 700khz voltage (v) ? input current ( a) 1 3 5 7 lt1371 ?g07 ? ? 0 2 4 ?? ? 1 3 5 08 2 4 6 9 v in = 5v feedback pin voltage (v) 0 switching frequency (% of typical) 70 90 110 0.8 lt1371 ?g08 5030 60 80 100 4020 10 0.2 0.4 0.6 0.1 0.9 0.3 0.5 0.7 1.0 temperature ( c) ?0 0 transconductance ( mho) 200 600 800 1000 20001400 0 50 75 lt1371 ?g09 400 1600 1800 1200 ?5 25 100 125 150 g m = ? i (v c ) ? v (fb) switch saturation voltagevs switch current temperature ( c) ?0 1.8 input voltage (v) 2.0 2.2 2.4 2.6 05 0 100 150 lt1371 ?g03 2.8 3.0 ?5 25 75 125 minimum input voltagevs temperature duty cycle (%) 0 switch current limit (a) 2 4 61 3 5 20 40 60 80 lt1371 ?g02 100 10 0 30 50 70 90 25 c and 125 c ?5 c switch current limitvs duty cycle switch current (a) 0 switch saturation voltage (v) 0.6 0.8 1.0 3.2 lt1371 ?g01 0.4 0.2 0.5 0.7 0.9 0.3 0.1 0 0.8 1.6 2.4 4.0 2.8 0.4 1.2 2.0 3.6 100 c 150 c 25 c ?5 c downloaded from: http:///
5 lt1371 typical perfor m a n ce characteristics u w temperature ( c) ?0 feedback input current (na) 400 500 600 150 lt1371 ?g11 300200 0 0 50 100 100 800700 ?5 25 75 125 v fb =v ref feedback input currentvs temperature temperature ( c) ?0 ?0 negative feedback input current ( a) ?0 0 0 50 75 lt1371 ?g12 ?0 ?0 ?0 ?5 25 100 125 150 v nfb =v nfr negative feedback input currentvs temperature v c pin threshold and high clamp voltage vs temperature temperature ( c) ?0 0.4 v c pin voltage (v) 0.6 1.0 1.2 1.4 2.41.8 0 50 75 lt1371 ?g10 0.8 2.0 2.2 1.6 ?5 25 100 125 150 v c high clamp v c threshold pi n fu n ctio n s uuu v c : the compensation pin is used for frequency compen- sation, current limiting and soft start. it is the output of theerror amplifier and the input of the current comparator. loop frequency compensation can be performed with an rc network connected from the v c pin to ground. fb: t he feedback pin is used for positive output voltage sensing and oscillator frequency shifting. it is the invert-ing input to the error amplifier. the noninverting input of this amplifier is internally tied to a 1.245v reference. load on the fb pin should not exceed 250 a when nfb pin is used. see applications information.nfb: the negative feedback pin is used for negative output voltage sensing. it is connected to the invertinginput of the negative feedback amplifier through a 100k source resistor. s/s (r and t7 packages only): shutdown and synchroni- zation pin. the s/s pin is logic level compatible. shutdownis active low and the shutdown threshold is typically 1.3v. for normal operation, pull the s/s pin high, tie it to v in or leave it floating. to synchronize switching, drive the s/spin between 600khz and 800khz. shdn: (sw package only): the shutdown pin is active low and the shutdown threshold is typically 1.3v. fornormal operation, pull the shdn pin high, tie it to v in or leave it floating.sync (sw package only): to synchronize switching, drive the sync pin between 600khz and 800khz. if notused, the sync pin can be tied high, low or left floating. v in : bypass input supply pin with a low esr capacitor, 10 f or more. the regulator goes into undervoltage lock- out when v in drops below 2.5v. undervoltage lockout stops switching and pulls the v c pin low. v sw : the switch pin is the collector of the power switch and has large currents flowing through it. keep the tracesto the switching components as short as possible to minimize radiation and voltage spikes. gnd: tie all ground pins to a good quality ground plane. downloaded from: http:///
6 lt1371 block diagra m w operatio n u the lt1371 is a current mode switcher. this means thatswitch duty cycle is directly controlled by switch current rather than by output voltage. referring to the block diagram, the switch is turned on at the start of each oscillator cycle. it is turned off when switch current reaches a predetermined level. control of output voltage is obtained by using the output of a voltage sensing error amplifier to set current trip level. this technique has several advantages. first, it has immediate response to input voltage variations, unlike voltage mode switchers which have notoriously poor line transient response. second, it reduces the 90 phase shift at mid-frequencies in the energy storage inductor. this greatly simplifiesclosed-loop frequency compensation under widely vary- ing input voltage or output load conditions. finally, it allows simple pulse-by-pulse current limiting to provide maximum switch protection under output overload or short conditions. a low dropout internal regulator pro- vides a 2.3v supply for all internal circuitry. this low dropout design allows input voltage to vary from 2.7v to 25v with virtually no change in device performance. a 500khz oscillator is the basic clock for all internal timing.it turns on the output switch via the logic and driver circuitry. special adaptive anti-sat circuitry detects onset of saturation in the power switch and adjusts driver current instantaneously to limit switch saturation. this minimizes driver dissipation and provides very rapid turn- off of the switch. a 1.245v bandgap reference biases the positive input ofthe error amplifier. the negative input of the amplifier is brought out for positive output voltage sensing. the error amplifier has nonlinear transconductance to reduce out- put overshoot on start-up or overload recovery. when the feedback voltage exceeds the reference by 40mv, error amplifier transconductance increases 10 times, which reduces output overshoot. the feedback input also invokes oscillator frequency shifting, which helps pro- tect components during overload conditions. when the feedback voltage drops below 0.6v, the oscillator fre- quency is reduced 5:1. lower switching frequency allows full control of switch current limit by reducing minimum switch duty cycle. + nfba nfb shdn s/s* sync fb 100k 50k 0.04 + ea v c v in gnd lt1371 ?bd gnd sense *r and t7 packages only 1.245v ref 5:1 frequency shift osc sync shutdown delay and reset low dropout 2.3v reg anti-sat logic driver sw switch + ia a v 6 comp downloaded from: http:///
7 lt1371 applicatio s i for atio uu w u unique error amplifier circuitry allows the lt1371 todirectly regulate negative output voltages. the negative feedback amplifier? 100k source resistor is brought out for negative output voltage sensing. the nfb pin regulates at 2.49v while the amplifier output internally drives the fb pin to 1.245v. this architecture, which uses the same main error amplifier, prevents duplicating functions and maintains ease of use. consult ltc marketing for units that can regulate down to 1.25v. the error signal developed at the amplifier output isbrought out externally. this pin (v c ) has three different functions. it is used for frequency compensation, currentlimit adjustment and soft starting. during normal regula- tor operation this pin sits at a voltage between 1v (low output current) and 1.9v (high output current). the error amplifier is a current output (g m ) type, so this voltage can be externally clamped for lowering current limit. like-wise, a capacitor coupled external clamp will provide soft start. switch duty cycle goes to zero if the v c pin is pulled below the control pin threshold, placing the lt1371 in anidle mode. positive output voltage setting the lt1371 develops a 1.245v reference (v ref ) from the fb pin to ground. output voltage is set by connecting thefb pin to an output resistor divider (figure 1). the fb pin bias current represents a small error and can usually be ignored for values of r2 up to 7k. the suggested value for r2 is 6.19k. the nfb pin is normally left open for positive output applications. positive fixed voltage versions are available (consult ltc marketing). negative output voltage setting the lt1371 develops a 2.49v reference (v nfr ) from the nfb pin to ground. output voltage is set by connecting the nfb pin to an output resistor divider (figure 2). the ?0 a nfb pin bias current (i nfb ) can cause output voltage errors and should not be ignored. this has beenaccounted for in the formula in figure 2. the suggested value for r2 is 2.49k. the fb pin is normally left open for negative output applications. see dual polarity output voltage sensing for limitations on fb pin loading when using the nfb pin. dual polarity output voltage sensingcertain applications benefit from sensing both positive and negative output voltages. one example is the ?ual output flyback converter with overvoltage protection circuit shown in the typical applications section. each output voltage resistor divider is individually set as de- scribed above. when both the fb and nfb pins are used, r1 v out = v ref 1 + r2 fb pin v ref v out () r1 r2 r1 = r2 ?1 () v out 1.245 lt1371 ?f01 the lt1371 acts to prevent either output from goingbeyond its set output voltage. for example, in this applica- tion if the positive output were more heavily loaded than the negative, the negative output would be greater and would regulate at the desired set-point voltage. the posi- tive output would sag slightly below its set-point voltage. this technique prevents either output from going unregu- lated high at no load. please note that the load on the fb pin should not exceed 250 a when the nfb pin is used. this situation occurs when the resistor dividers are usedat both fb and nfb. true load on fb is not the full divider current unless the positive output is shorted to ground.see dual output flyback converter application. applicatio s i for atio uu w u figure 1. positive output resistor divider figure 2. negative output resistor divider r1 ? out = v nfb + i nfb (r1) 1 + r2 lt1371 ?f02 nfb pin v nfr i nfb ? out () r1 r2 r1 = + 30 ?10 6 ? v out ? ?2.49 ( ) ( ) 2.49 r2 downloaded from: http:///
8 lt1371 shutdown and synchronizationthe 7-pin r and t7 package devices have a dual function s/s pin which is used for both shutdown and synchroni- zation. the sw package device has both a shutdown (shdn) pin and a synchronization (sync) pin which can be used separately or tied together. these pins are logic level compatible and can be pulled high, tied to v in or left floating for normal operation. a logic low on the s/s pin orshdn pin activates shutdown, reducing the part? supply current to 12 a. typical synchronization range is from 1.05 to 1.8 times the part? natural switching frequency,but is only guaranteed between 600khz and 800khz. a 12 s resetable shutdown delay network guarantees the part will not go into shutdown while receiving a synchro-nization signal when the functions are combined. caution should be used when synchronizing above 700khz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. this type of subharmonic switching only occurs when the duty cycle of the switch is above 50%. higher inductor values will tend to eliminate problems. thermal considerations care should be taken to ensure that the worst-case input voltage and load current conditions do not cause exces- sive die temperatures. typical thermal resistance is 30 c/w for the r package and 50 c/w for the sw and t7 packages but these numbers will vary depending on themounting techniques (copper area, air flow, etc.). heat is transferred from the r and t7 packages via the tab and from the sw package via pins 4 to 7 and 14 to 17. average supply current (including driver current) is: i in = 4ma + dc [i sw /60 + i sw (0.004)] i sw = switch current dc = switch duty cycle switch power dissipation is given by: p sw = (i sw ) 2 (r sw )(dc) r sw = output switch on resistance total power dissipation of the die is the sum of supplycurrent times supply voltage, plus switch power: p d(total) = (i in )(v in ) + p sw surface mount heat sinks are also becoming availablewhich can lower package thermal resistance by 2 or 3 times. one manufacturer is wakefield engineering who offers surface mount heat sinks for both the r package (dd) and sw package (sw20) and can be reached at (617) 245-5900. choosing the inductor for most applications the inductor will fall in the range of 2.2 h to 22 h. lower values are chosen to reduce physi- cal size of the inductor. higher values allow more outputcurrent because they reduce peak current seen by the power switch, which has a 3a limit. higher values also reduce input ripple voltage and reduce core loss. when choosing an inductor you might have to consider maximum load current, core and copper losses, allowable component height, output voltage ripple, emi, fault current in the inductor, saturation and, of course, cost. the following procedure is suggested as a way of handling these somewhat complicated and conflicting requirements. 1. assume that the average inductor current for a boost converter is equal to load current times v out /v in and decide whether or not the inductor must withstandcontinuous overload conditions. if average inductor current at maximum load current is 1a, for instance, a 1a inductor may not survive a continuous 3a overload condition. also be aware that boost converters are not short-circuit protected and that, under output short conditions, inductor current is limited only by the available current of the input supply. 2. calculate peak inductor current at full load current to ensure that the inductor will not saturate. peak currentcan be significantly higher than output current, espe- cially with smaller inductors and lighter loads, so don? omit this step. powdered iron cores are forgiving because they saturate softly, whereas ferrite cores applicatio s i for atio uu w u downloaded from: http:///
9 lt1371 applicatio s i for atio uu w u saturate abruptly and other core materials fall in be-tween. the following formula assumes continuous mode operation but it errs only slightly on the high side for discontinuous mode, so it can be used for all conditions. i peak = (i out ) v in = minimum input voltage f = 500khz switching frequency + v out v in v in (v out v in ) 2(f)(l)(v out ) ) ) 3. decide if the design can tolerate an ?pen?core geom- etry, like a rod or barrel, which has high magnetic fieldradiation, or whether it needs a closed core, like a toroid, to prevent emi problems. one would not want an open core next to a magnetic storage media, for in- stance! this is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem. 4. start shopping for an inductor which meets the re- quirements of core shape, peak current (to avoidsaturation), average current (to limit heating) and fault current. if the inductor gets too hot, wire insulation will melt and cause turn-to-turn shorts. keep in mind that all good things like high efficiency, low profile and high temperature operation will increase cost, sometimes dramatically. 5. after making an initial choice, consider the secondary things like output voltage ripple, second sourcing, etc.use the experts in the ltc applications department if you feel uncertain about the final choice. they have experience with a wide range of inductor types and can tell you about the latest developments in low profile, surface mounting, etc. output capacitor the output capacitor is normally chosen by its effectiveseries resistance (esr), because this is what determines output ripple voltage. at 500khz any polarized capacitor is essentially resistive. to get low esr takes volume , so physically smaller capacitors have high esr. the esrrange needed for typical lt1371 applications is 0.025 to 0.2 . a typical output capacitor is an avx type tps, 22 f at 25v (2 each), with a guaranteed esr less than 0.2 . this is a ??size surface mount solid tantalum capacitor. tps capacitors are specially constructed andtested for low esr, so they give the lowest esr for a given volume. to further reduce esr, multiple output capaci- tors can be used in parallel. the value in microfarads is not particularly critical, and values from 22 f to greater than 500 f work well, but you cannot cheat mother nature on esr. if you find a tiny 22 f solid tantalum capacitor, it will have high esr and output ripple voltagewill be terrible. table 1 shows some typical solid tantalum surface mount capacitors. table 1. surface mount solid tantalum capacitoresr and ripple current e case size esr (max ) ripple current (a) avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 avx taj 0.7 to 0.9 0.4 d case size avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 avx taj 0.9 to 2.0 0.36 to 0.24 c case size avx tps 0.2 (typ) 0.5 (typ) avx taj 1.8 to 3.0 0.22 to 0.17 b case size avx taj 2.5 to 10 0.16 to 0.08 many engineers have heard that solid tantalum capacitorsare prone to failure if they undergo high surge currents. this is historically true and avx type tps capacitors are specially tested for surge capability, but surge ruggedness is not a critical issue with the output capacitor. solid tantalum capacitors fail during very high turn-on surges, which do not occur at the output of regulators. high discharge surges, such as when the regulator output is dead-shorted, do not harm the capacitors.single inductor boost regulators have large rms ripple current in the output capacitor, which must be rated to handle the current. the formula to calculate this is: downloaded from: http:///
10 lt1371 applicatio s i for atio uu w u generates a loop ?ero?at 5khz to 50khz that is instrumen-tal in giving acceptable loop phase margin. ceramic ca- pacitors remain capacitive to beyond 300khz and usually resonate with their esl before esr becomes effective. they are appropriate for input bypassing because of their high ripple current ratings and tolerance of turn-on surges. output diode the suggested output diode (d1) is a 1n5821 schottky or its motorola equivalent mbr330. it is rated at 3a average forward current and 30v reverse voltage. typical forward voltage is 0.6v at 3a. the diode conducts current only during switch off time. peak reverse voltage for boost converters is equal to regulator output voltage. average forward current in normal operation is equal to output current. frequency compensation loop frequency compensation is performed on the output of the error amplifier (v c pin) with a series rc network. the main pole is formed by the series capacitor and theoutput impedance ( 500k ) of the error amplifier. the pole falls in the range of 2hz to 20hz. the series resistorcreates a ?ero?at 1khz to 5khz, which improves loop stability and transient response. a second capacitor, typi- cally one-tenth the size of the main compensation capaci- tor, is sometimes used to reduce the switching frequency ripple on the v c pin. v c pin ripple is caused by output voltage ripple attenuated by the output divider and multi-plied by the error amplifier. without the second capacitor, v c pin ripple is: v c pin ripple = v ripple = output ripple (v p? ) g m = error amplifier transconductance ( 1500 mho) r c = series resistor on v c pin v out = dc output voltage 1.245(v ripple )(g m )(r c ) (v out ) to prevent irregular switching, v c pin ripple should be kept below 50mv p? . worst-case v c pin ripple occurs at output capacitor ripple current (rms) i ripple (rms) = i out = i out v out v in v in dc 1 ?dc dc = switch duty cycle input capacitorsthe input capacitor of a boost converter is less critical due to the fact that the input current waveform is triangular and does not contain large squarewave currents as is found in the output capacitor. capacitors in the range of 10 f to 100 f, with an esr of 0.2 or less, work well up to full 3a switch current. higher esr capacitors may be acceptableat low switch currents. input capacitor ripple current for a boost converter is : i ripple = f = 500khz switching frequency 0.3(v in )(v out ?v in ) (f)(l)(v out ) the input capacitor can see a very high surge current whena battery or high capacitance source is connected ?ive and solid tantalum capacitors can fail under this condition. several manufacturers have developed tantalum capaci- tors specially tested for surge capability (avx tps series, for instance) but even these units may fail if the input voltage approaches the maximum voltage rating of the capacitor during a high surge. avx recommends derating capacitor voltage by 2:1 for high surge applications. ceramic, os-con and aluminum electrolytic capacitors may also be used and have a high tolerance to turn-on surges. ceramic capacitors higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. these are tempt- ing for switching regulator use because of their very low esr. unfortunately, the esr is so low that it can cause loop stability problems. solid tantalum capacitor esr downloaded from: http:///
11 lt1371 applicatio s i for atio uu w u maximum output load current and will also be increased ifpoor quality (high esr) output capacitors are used. the addition of a 0.0047 f capacitor on the v c pin reduces switching frequency ripple to only a few millivolts. a lowvalue for r c will also reduce v c pin ripple, but loop phase margin may be inadequate.layout considerations for maximum efficiency, lt1371 switch rise and fall times are made as short as possible. to prevent radiation and high frequency resonance problems, proper layout of the components connected to the switch node is essential. b field (magnetic) radiation is minimized by keeping output diode, switch pin and output bypass capacitor leads as short as possible. figures 3, 4 and 5 show recommended positions for these components. e field radiation is kept low by minimizing the length and area of all traces con- nected to the switch pin. a ground plane should always be used under the switcher circuitry to prevent interplane coupling. the high speed switching current path is shown schemati- cally in figure 6. minimum lead length in this path is essential to ensure clean switching and low emi. the path including the switch, output diode and output capacitor is the only one containing nanosecond rise and fall times. keep this path as short as possible. v in s/s gnd fb v sw v c nfb connect ground pin and tab directly to ground plane c d keep path from v sw , output diode, output capacitors and ground return as short as possible c lt1371 ?f03 figure 3. layout considerations r package v in s/s gnd fb v sw v c nfb connect ground pin and tab directly to ground plane. tab may be soldered or bolted to ground plane* c d keep path from v sw , output diode, output capacitors and ground return as short as possible *see t7 package layout considerations for vertical mounting of the t7 package c lt1371 ?f04 figure 4. layout considerations t7 package figure 6 load v out l1 switch node lt1371 ?f06 v in high frequency circulating path d connect all ground pins to ground plane cc keep path from v sw , output diode, output capacitors and ground return as short as possible lt1371 ?f05 v sw nc v sw gnd gnd gnd gnd nc nc gnd v c fb nfb gnd gnd gnd gnd shdn sync v in figure 5. layout considerations sw package downloaded from: http:///
12 lt1371 applicatio s i for atio uu w u lt1371t7 v in v in v c tab system ground floating node (tab ties internally to pin 4 ground) 4 2 1 5 7 gnd gnd fb lt1371 ?f07 v sw v out figure 7. tab connections for vertically mounted t7 package t7 package layout considerationselectrical connection to the tab of a t7 package is required for proper device operation. if the tab is tied directly to the ground plane (figure 4) no other considerations are nec- essary. if the tab is not connected directly to the ground plane, as in a vertically mounted application, a separate electrical connection from the tab to a ?loating node?is required. ground returns for the v in capacitor, v c compo- nents and output feedback resistor divider are then con-nected to the floating node. this is shown schematically in figure 7. all other system ground connections are made to pin 4. the electrical connection from the t7 package tab to the floating node must be a low resistance (< 0.1 ), low inductance (< 20nh) path which can be accomplished with a jumper wire or an electrically conductive heat sink. bolt the jumper wire directly to the tab using a solder tail to maintain low resistance. the jumper wire length should not exceed 3/4 inch of 24 awg gauge wire or larger to minimize the inductance. vertically mounted electrically conductive heat sinks are available from many heat sink manufacturers. these heat sinks also have tabs that solder directly to the board creating the required low resistance, low inductance path from the tab to the floating node. the tab should be bolted or soldered directly to the heat sink to maintain lowresistance. heat sinks are available in clip-on styles but are only recommended if the tab to heat sink contact resis- tance can be maintained below 0.1 for the life of the product.more help for more detailed information on switching regulator circuits, please see application note 19. linear technol- ogy also offers a computer software program, switchercad, to assist in designing switching converters. in addition, our applications department is always ready to lend a helping hand. downloaded from: http:///
13 lt1371 typical applicatio n s n u positive-to-negative converter with direct feedback dual output flyback converter with overvoltage protection 2 li-ion cells to 5v sepic converter** single li-ion cell to 5v lt1371 v in gnd v in 4v to 9v v c fb lt1371 ?ta05 v sw s/s c1 33 f 20v c4 0.047 f c5 0.0047 f r1 2k r3 6.19k 1% r2 18.7k 1% v out ? 5v c3 100 f 10v 2 on off l1a* 10 h l1b* 10 h c2 4.7 f c1 = avx tpsd 336m020r0200 c2 = tokin 1e475zy5u-c304 c3 = avx tpsd107m010r0100 single inductor with two windings coiltronics ctx10-4 input voltage may be greater or less than output voltage + + mbrs330t3 v in 4v 5v 7v 9v i out 0.85a 1a 1.3a 1.5a ? max i out * ** lt1371 v in v c v in 2.7v to 13v *coiltronics ctx10-4 gnd nfb lt1371 ?ta03 v sw s/s d2 p6ke-15a d3 1n4148 d1 mbrs330t3 c1 100 f c2 0.047 f c3 0.0047 f r1 2k r3 2.49k 1% r2 2.49k 1% ? out ? ?v + c4 100 f 2 + on off v in 3v 5v 9v i out 0.6a 1.0a 1.5a 21 4 t1* 3 ? max i out lt1371 v in v c gnd fb lt1371 ?ta06 v sw s/s l1* c1** 100 f 10v single li-ion cell c4** 100 f 10v 2 c2 0.047 f c3 0.0047 f r3 2k r2 6.19k 1% r1 18.7k 1% v out ? 5v d1 mbrs320t3 on off * ** coilcraft do3316p-103 avx tpsd107m010r0100 + + + v in 2.7v 3.3v 3.6v i out 1.2a 1.6a 1.8a ? max i out lt1371 v in fb v c v in 2.7v to 10v *dale lpe-5047-100mb gnd nfb lt1371 ?ta04 v sw s/s p6ke-20a 1n4148 mbrs360t3 mbrs360t3 c1 22 f r2 6.19k 1% r1 68.1k 1% c2 0.047 f c3 0.0047 f r3 2k r5 2.49k 1% r4 12.1k 1% ? out ?5v v out 15v + c4 47 f + c5 47 f + on off 2, 38, 9 7 t1* 4 10 1 downloaded from: http:///
14 lt1371 typical applicatio n s n u 20w ccfl supply laser power supply laser 190 1% 1n4002 (all) 0.1 f 10k v in 10 f v c v in fb gnd 2.2 f v in 12v to 25v 150 mur405 l2 82 h lt1371 l1 5 4 1 3 2 8 11 hv diodes 1800pf 10kv 0.01 f 5kv 1800pf 10kv 47k 5w 2.2 f 0.47 f l1 = l2 = q1, q2 = 0.47 f = hv diodes = laser = coiltronics ctx02-11128 gowanda ga40-822k zetex ztx849 wima 3x 0.15 f type mkp-20 semtech-fm-50 hughes 3121h-p coiltronics (407) 241-7876 + + 10k lt1371 ?ta08 v sw + q1 q2 140 1 f 2.2 f v c v in fb gnd 2.2 f v in 9v to 15v 150 mur405 l2 15 h lt1371 l1 54 1 3 2 8 11 22 f 0.47 f l1 = coiltronics ctx02-11128 l2 = coilcraft do3316p-153 q1, q2 = zetex ztx849, zdt1048 or rohm 2sc5001 0.47 f = wima 3x 0.15 f type mkp-20 coiltronics (407) 241-7876 + + 10k lt1371 ?ta07 v sw 1n4148 lamp 47pf 1n4148 1n4148 intensity control 22k q1 q2 + downloaded from: http:///
15 lt1371 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio n u dimensions in inches (millimeters) unless otherwise noted. r package 7-lead plastic dd pak (ltc dwg # 05-08-1462) s20 (wide) 0695 note 1 0.496 ?0.512* (12.598 ?13.005) 20 19 18 17 16 15 14 13 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 910 11 12 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) typ 0.014 ?0.019 (0.356 ?0.482) typ 0 ?8 typ note 1 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299** (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** sw package 20-lead plastic small outline (wide 0.300) (ltc dwg # 05-08-1620) r (dd7) 0695 0.026 ?0.036 (0.660 ?0.914) 0.143 +0.012 0.020 () 3.632 +0.305 0.508 0.040 ?0.060 (1.016 ?1.524) 0.013 ?0.023 (0.330 ?0.584) 0.095 ?0.115 (2.413 ?2.921) 0.004 +0.008 0.004 () 0.102 +0.203 0.102 0.050 0.012 (1.270 0.305) 0.059 (1.499) typ 0.045 ?0.055 (1.143 ?1.397) 0.165 ?0.180 (4.191 ?4.572) 0.330 ?0.370 (8.382 ?9.398) 0.060 (1.524) typ 0.390 ?0.415 (9.906 ?10.541) 15 typ 0.300 (7.620) 0.075 (1.905) 0.183 (4.648) 0.060 (1.524) 0.060 (1.524) 0.256 (6.502) bottom view of dd pak hatched area is solder plated copper heak sink downloaded from: http:///
16 lt1371 ? linear technology corporation 1995 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 telex : 499-3977 lt/gp 0996 5k rev a ? printed in the usa package descriptio n u dimensions in inches (millimeters) unless otherwise noted. t7 package 7-lead plastic to-220 (standard) (ltc dwg # 05-08-1422) part number description comments lt1171 100khz 2.5a boost switching regulator good for up to v in = 40v ltc 1265 12v 1.2a monolithic buck converter converts 5v to 3.3v at 1a with 90% efficiency lt1302 micropower 2a boost converter converts 2v to 5v at 600ma in so-8 packages lt1372 500khz 1.5a boost switching regulator also regulates negative flyback outputs lt1373 low supply current 250khz 1.5a boost switching regulator 90% efficient boost converter with constant frequency lt1376 500khz 1.5a buck switching regulator steps down from up to 25v using 4.7 h inductors lt1512 500khz 1.5a sepic battery charger input voltage may be greater or less than battery voltage lt1513 500khz 3a sepic battery charger input voltage may be greater or less than battery voltage related parts 0.040 ?0.060 (1.016 ?1.524) 0.026 ?0.036 (0.660 ?0.914) t7 (to-220) (formed) 0695 0.135 ?0.165 (3.429 ?4.191) 0.700 ?0.728 (17.780 ?18.491) 0.045 ?0.055 (1.143 ?1.397) 0.165 ?0.180 (4.293 ?4.572) 0.095 ?0.115 (2.413 ?2.921) 0.013 ?0.023 (0.330 ?0.584) 0.620 (15.75) typ 0.155 ?0.195 (3.937 ?4.953) 0.152 ?0.202 (3.860 ?5.130) 0.260 ?0.320 (6.604 ?8.128) 0.147 ?0.155 (3.734 ?3.937) dia 0.390 ?0.415 (9.906 ?10.541) 0.330 ?0.370 (8.382 ?9.398) 0.460 ?0.500 (11.684 ?12.700) 0.570 ?0.620 (14.478 ?15.748) 0.230 ?0.270 (5.842 ?6.858) downloaded from: http:///

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